Buffer-controlled cache for low-power multicore systems

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  • DOI 10.1109/cce.2016.7562627
  • OpenAlex ID W2509523906
  • Type Conference-paper
  • Language EN
  • Published 01 Jul 2016
  • Volume e88
  • Pages 147–152
  • Source IEEE International Conference on Communi…
  • FWCI 0.26
  • Countries 1
  • Institutions 1
  • Added 10 Oct 2025
  • Updated 05 Oct 2026
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Buffer-controlled cache for low-power multicore systems

Conference-paper 2016 EN

This paper proposes a buffered dual-access mode cache to reduce power consumption in multicore embedded systems. This cache is called as Buffer-Controlled Cache (BCC). The proposed cache includes a pre-cache buffer to determine how to access the cache in two different ways. The BCC scheme shows better prediction rates and lower power consumption than other popular low-power caches, such as Phased…

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1 Marven Calagos The University of Texas Rio Gr… (US) —
2 Yul Chu The University of Texas Rio Gr… (US)

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