A versatile data cache for trace buffer support
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- DOI 10.1109/vldi-dat.2013.6533821
- OpenAlex ID W2020176098
- Type Conference-paper
- Language EN
- Published 01 Apr 2013
- Pages 1–4
- Source International Symposium on VLSI Design, …
- Countries 1
- Institutions 1
- Added 10 Oct 2025
- Updated 16 Oct 2026
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A versatile data cache for trace buffer support
Conference-paper 2013 EN
Since the cache system has been a predominant part of modern SoC's, we proposes a novel approach to enhance the versatility of the data cache by making it, called D/T (data/trace) cache, to function both as a regular data cache and as a trace buffer for real time processor monitoring and debugging. The cache structure is modified such that a portion of the cache ways can be configured as a trace b…
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3 authors| # | Author | Institutions | ORCID |
|---|---|---|---|
| 1 | Chun-Hung Lai | National Sun Yat-sen Universit… (TW) | — |
| 2 | Yun-Chung Yang | National Sun Yat-sen Universit… (TW) | — |
| 3 | Ing-Jer Huang | National Sun Yat-sen Universit… (TW) |
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