Reducing cache conflicts by multi-level cache partitioning a…
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- DOI 10.1109/icpads.2000.857699
- OpenAlex ID W2098406302
- Type Conference-paper
- Language EN
- Published 07 Nov 2002
- Pages 195–202
- Source International Conference on Parallel and…
- FWCI 0.20
- Countries 1
- Institutions 2
- Added 10 Oct 2025
- Updated 05 Oct 2026
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Reducing cache conflicts by multi-level cache partitioning and array elements mapping
Conference-paper 2002 EN
The paper presents an algorithm to reduce cache conflicts and improve cache localities. The proposed algorithm analyzes unique locality reference space for each reference pattern, partitions the multi-level cache into several parts with different size, and then maps array data onto the scheduled cache positions such that cache conflicts can be eliminated. To reduce the memory overhead for mapping…
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Authors & Affiliations
3 authors| # | Author | Institutions | ORCID |
|---|---|---|---|
| 1 | Chih‐Yung Chang | Aletheia University (TW) | |
| 2 | Jang‐Ping Sheu | Aletheia University (TW) National Central University (TW) | |
| 3 | Hsi-Chiuen Chen | Aletheia University (TW) National Central University (TW) | — |
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