Nonvolatile SRAM Cell
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- DOI 10.1109/iedm.2006.346730
- OpenAlex ID W2004369723
- Type Conference-paper
- Language EN
- Published 01 Jan 2006
- Pages 1–4
- Source Technical digest - International Electro…
- Publisher Institute of Electrical and Electro…
- FWCI 4.24
- Countries 2
- Institutions 3
- Added 10 Oct 2025
- Updated 16 Oct 2026
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Nonvolatile SRAM Cell
Conference-paper 2006 EN
A nonvolatile SRAM cell with two back-up nonvolatile memory devices is proposed. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty. A slight performance penalty is anticipated
66
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8
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Authors & Affiliations
8 authors| # | Author | Institutions | ORCID |
|---|---|---|---|
| 1 | Wei Wang | Stanford SystemX Alliance Stanford University (US) | — |
| 2 | Aaron Gibby | Stanford SystemX Alliance Stanford University (US) | — |
| 3 | Zheng Wang | Stanford SystemX Alliance Stanford University (US) | |
| 4 | Tze Wee Chen | Stanford SystemX Alliance Stanford University (US) | — |
| 5 | Shinobu Fujita | Toshiba (Japan) (JP) | — |
| 6 | Peter B. Griffin | Stanford SystemX Alliance Stanford University (US) | |
| 7 | Yoshio Nishi | Stanford SystemX Alliance Stanford University (US) | |
| 8 | S.S. Wong | Stanford SystemX Alliance Stanford University (US) |
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