Reliability Study of Split Gate Silicon Nanocrystal Flash EE…
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- DOI 10.1109/nvsmw.2007.4290587
- OpenAlex ID W2036350002
- Type Conference-paper
- Language EN
- Published 01 Jan 2007
- Pages 75–76
- Source IEEE International Memory Workshop (IMW)
- FWCI 0.50
- Added 24 Jun 2016
- Updated 27 Oct 2026
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Reliability Study of Split Gate Silicon Nanocrystal Flash EEPROM
Conference-paper 2007 EN
In this paper, we present a measurement based on biased data retention to determine the direction of charge loss. Top oxide and bottom oxide thickness can be optimized to meet long term reliability goal. A split gate nanocrystal nonvolatile memory with large program window, while demonstrating excellent data retention and program disturb characteristics is also presented.
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Authors & Affiliations
5 authors| # | Author | Institutions | ORCID |
|---|---|---|---|
| 1 | Cheong Min Hong | — | — |
| 2 | Jane A. Yater | — | — |
| 3 | Sung-Taeg Kang | — | — |
| 4 | Horacio Gasquet | — | — |
| 5 | Gowrishankar Chindalore | — | — |
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