SJ
Seong‐Ook Jung

Highly Cited

233
Works
3,086
Citations
30
H-Index
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Seong‐Ook Jung

Also known as: S. Jung, S. O. Jung, S.-O. Jung, S.O. Jung, Seong-OoK Jung

233

Total Works

3,086

Citations

30

H-Index

92

i10-Index

Citation & Works Trend by Year
26 years active
Top Research Topics
Low-power high-performance VLSI design (198) Advanced Memory and Neural Computing (96) Advancements in Semiconductor Devices and Circuit Design (93) Analog and Mixed-Signal Circuit Design (60) Magnetic properties of thin films (31)
Recent Publications
15 shown
Year Publication Title Citations Action
2026 A Wide-Range and Energy-Efficient Level Shifter With Robust Leakage-Suppressed Pull-Down Network IEEE Transactions on Circuits and Systems I Regular Papers 0
2026 Dual-Mode Inverter-Based Write Termination Scheme for Energy- and Area-Efficient Write Operation in 28-nm 1T1MTJ STT-MRAM IEEE Journal of Solid-State Circuits 0
2026 Design and Analysis of Reconfigurable FP16INT8 Dual-Mode Multiplier on FPGA International Conference on Electronics, Information, and Communication (ICEIC) 0
2025 Multi-Modal Explainable Deep Learning-Assisted Signal Integrity Prediction Methodology IEEE International Conference on Electronics, Circuits and Systems (ICECS) 1
2025 DPe-CIM: A 4T-1C Dual-Port eDRAM-Based Compute-in-Memory for Simultaneous Computing and Refresh With Adaptive Refresh and Data Conversion Reduction Scheme IEEE Journal of Solid-State Circuits 1
2025 A 3× Offset, 2.9× Power, 1.3× Sensing Time, and 4× Area Reduction Direct Input Transfer Offset Cancel DRAM IO Sense Amplifier With Static Current-Free Pre-Sensing IEEE Journal of Solid-State Circuits 2
2025 A High-Density Low-Leakage and Low-Power Fully Voltage-Stacked SRAM for IoT Application IEEE Journal of Solid-State Circuits 2
2025 Vertically Integrated In‐Sensor Processing System Based on Three‐Dimensional Reservoir for Artificial Tactile System Energy & environment materials 5
2025 Asymmetric Voltage Latch Type and Ultra-Low Swing Bitline Sense Amplifiers for Low-Power High-Density 1R1W 8T SRAM in 14 nm FinFET IEEE Transactions on Circuits and Systems I Regular Papers 2
2025 A 14 nm SRAM Using NMOS Header Assist Cell for Improved Write Ability and Reduced Cell Retention Leakage With Minimal Power Overhead IEEE Journal of Solid-State Circuits 2
2025 SRAM BL Predriven Write Operation With Row and Voltage Auto-Tracking Replica BL in Resistance-Dominated Technology Nodes IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2
2025 Design and Analysis of Static-Free PAM-4 Transmitter for HBM TSV Interface International Conference on Electronics, Information, and Communication (ICEIC) 1
2024 DPe-CIM: A 4T1C Dual-Port eDRAM Compute-in-Memory for Simultaneous Computing and Refresh with Adaptive Refresh and Data Conversion Reduction Scheme IEEE Asian Solid-State Circuits Conference (A-SSCC) 5
2024 Dual-Input Stacked Inverter-Based Single-Ended DRAM Sense Amplifier Using BL Switches for Low-Power High-Speed Sensing IEEE Journal of Solid-State Circuits 5
2024 A Low-Voltage Area-Efficient TSV I/O With QEC Realizing Data Rate up to 15 Gb/s for TSV Interface IEEE Journal of Solid-State Circuits 2

Data source: OpenAlex API